arm

本文档使用 MrDoc 发布

arm架构及系统

https://www.arm.com/architecture/cpu

https://developer.arm.com/documentation/102404/0201/About-the-Arm-architecture

|A-Profile (Applications)|R-Profile (Real-Time)|M-Profile (Microcontroller)|
|--|--|--|
High performance|Targeted at systems with real-time requirements|Small, highly power- efficient devices
Designed to run a complex operating system, such as Linux or Windows|Commonly found in networking equipment, and embedded control systems|Found at the heart of many IoT devices

![](/media/202404/2024-04-06_145128_472930.png)

![](/media/202404/2024-04-06_142716_199966.png)

![](/media/202404/2024-04-06_142802_703290.png)

|Architecture|Cortex-A53|Cortex-A72|
|--|--|--|
Target|Optimized for power efficiency|Optimized for performance
Pipeline|8 stages In-order|15+ stages Out-of-order
Caches|L1 I cache: 8KB - 64KB L1 D cache: 8KB - 64KB L2 cache: optional, up to 2MB|L1 I cache: 48KB fixed L1 D cache: 32KB fixed L2 cache: mandatory, up to 2MB

![](/media/202404/2024-04-06_143130_442606.png)

智能制造CEO 2024年4月6日 14:51 收藏文档

下一篇